Welcome to the T-VEC Wiki
The T-VEC wiki provides information about T-VEC's suite of tools, how to use them, and any other related information. It has no specific topic, but is for all things related to T-VEC. Everyone has access to the wiki, but only registered users can edit content. We encourage users to donate meaningful documentation and information to the T-VEC wiki. If you are new here, you must register for a www.t-vec.com username/password. All documentation contributed is covered by the documentation license.
The multi-media video provides a quick way to get a Tool Suite Overview.
The T-VEC suite of tools provide model-based test support. The tools include:
- T-VEC Tablular Modeler (TTM)
- TTM provides requirement management, supports requirement and functional modeling
- Simulink Tester for T-VEC (SL2TVEC)
- SL2TVEC translates Simulink and Stateflow models into the VGS system
- T-VEC Vector Generation System (VGS)
Pilot Projects or Workshops are often the best way to get started with T-VEC tools.
Tvecwiki provides guidance on using the tools, from installation, tutorials, usage, and FAQs.
- Installation and Computing Resource Requirements
- License Management
- Requirement Management
- Test Generation
- Test Driver Generation
- Code Coverage
- Test Execution
- Reports, Status and Measures
- Configuration Management
Other Common Questions
- Simulink Tester limitations, usage issues, and guidelines
- Product and Project Measurement
- DO-178B and DO-178C
- Formal Methods, Model Checking and Theorem Provers
- MC/DC, Test Coverage or Model Coverage