Hi Jack

I apologize, but I am not quite sure what your question is asking about. So let me describe a simple example model with a bitwise AND block and also a logical AND block.

- bitwise_and_logical_AND.png (15.03 KiB) Viewed 5524 times

This code that the RTW generates for this simple model is the following.

- bitwise_and_logical_AND_code.png (7.94 KiB) Viewed 5521 times

As you can see there are no decision branches in this code. Therefore, only 1 test vector is necessary for complete MCDC code coverage. Therefore, the default set of test vectors after translation of this model with no forcePath or forceCondition options is the following

- bitwise_and_logical_AND_vectors.png (5.34 KiB) Viewed 5519 times

However, the code generator could implement the logical AND block using if-then-else type branching logic. Therefore, we provide translation options such as forcePaths and forceConditions. This next set of test vectors is generated from a translation using the forceConditions options. This causes DCP's for all the possible logical AND block combinations. However, because there really is only one way to implement bitwise AND, there is no additional DCP's for that block, just the default case. These are the resulting vectors.

- bitwise_and_logical_AND_FC_vectors.png (17.03 KiB) Viewed 5523 times

Hopefully, this will answer your question. But if not, please ask again and perhaps add some additional information so that I can understand your question better.

BestRegards

Bob