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Welcome to the T-VEC Wiki

Introduction

The T-VEC wiki provides information about T-VEC's suite of tools, how to use them, and any other related information. It has no specific topic, but is for all things related to T-VEC. Everyone has access to the wiki, but only registered users can edit content. We encourage users to donate meaningful documentation and information to the T-VEC wiki. If you are new here, you must register for a www.t-vec.com username/password. All documentation contributed is covered by the documentation license.

Getting Started

The multi-media video provides a quick way to get a Tool Suite Overview.

The T-VEC suite of tools provide model-based test support. The tools include:

• T-VEC Tablular Modeler (TTM)
  • TTM provides requirement management, supports requirement and functional modeling

• Simulink Tester for T-VEC (SL2TVEC)
  • SL2TVEC translates Simulink and Stateflow models into the VGS system

• T-VEC Vector Generation System (VGS)
  • VGS is the engine that provides model analysis, test vector generation, test driver generation, test results analysis, project status, and measurement reporting

If you're new to modeling, TTM is easy to use, and you can create your first model in a matter of minutes. TTM integrates seamlessly with VGS, and with one mouse click tests for your first model can be produced quickly. TTM has built-in help, tutorials, and course exercises built-in to the installation.

Simulink users can use SL2TVEC and VGS to support model analysis, test generation, and execution for auto-generated code, manually produced code, and the Matlab simulator.

VGS is the core T-VEC technologies developed in the late 1980's and early 1990's. It is a rather mature technology, and has not changed in any real fundamental way since the documentation. Most of the default setting provide the optimal set of tests.

Pilot Projects or Workshops are often the best way to get started with T-VEC tools.

Content

Tvecwiki provides guidance on using the tools, from installation, tutorials, usage, and FAQs.

• Installation and Computing Resource Requirements
• License Management
• Requirement Management
• Modeling
  • Requirement Models
  • Design Models
  • Hybrid Models
• Test Generation
  • Unit Testing
  • Integration Testing
  • System Testing
• Test Driver Generation
  • Test Harness
  • Test Driver Schema
• Test Execution
• Reports, Status and Measures
• Configuration Management
• Examples
  • T-VEC Tablular Modeler (TTM) Examples
  • Simulink Tester for T-VEC Examples

Other Common Questions

• Simulink Tester limitations, usage issues, and guidelines
• Product and Project Measurement
• DO-178B and DO-178C
• Formal Methods, Model Checking and Theorem Provers
• MC/DC, Test Coverage or Model Coverage

Register

Register here.