Mr. Safford's presentation summarized the benefits of applying T-VEC tools on a series of projects within Lockheed. Mr. Safford's presentation describes key benefits provided through T-VEC tools, which include:
"Better quality requirements for design and implementation help eliminate rework"
"Test generation from a verification model can eliminate up to 90% of the manual test creation and debugging effort"
Mr. Statezni's presentation summarized the results of applying the T-VEC's tools on projects within Rockwell. The presentation's conclusion was particularly compelling:
"Total savings: 30% - 40% savings of testing effort"